Array substrate, manufacturing method thereof and display device
US10756124B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 9, 2019 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | May 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/621
Abstract
An array substrate, manufacturing method thereof, and display device are disclosed. The array substrate includes signal lines; IC connection lines; the IC connection lines include at least two IC connection line groups, the at least two IC connection line groups comprise a first IC connection line group and a second IC connection line group, the array substrate further includes a lead, an orthographic projection of the lead on a straight line in a second direction is overlapped or connected with an orthographic projection of a first IC connection line in the first IC connection line group which is closest to the second IC connection line group on the straight line in a second direction and an orthographic projection of the second IC connection line in the second IC connection line group which is closest to the first IC connection line group on the straight line in a second direction respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.