Patent · US Active

Method of aligning semiconductor chips, method of arranging semiconductor chips, device that produces a semiconductor component, and semiconductor component

US10763238B2 · kind B2 · utility

0Cited by
1References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 30, 2017
Grant dateSep 1, 2020
Priority date
Expiry dateAug 30, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10H20/01
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of aligning semiconductor chips in a medium includes providing an electrically insulating liquid medium; providing semiconductor chips; forming a suspension with the medium and the semiconductor chips; exposing the semiconductor chips to electromagnetic radiation that generates free charge carriers in the semiconductor chips; arranging the suspension in an electric field in which the semiconductor chips are aligned along the electric field; and curing the medium after aligning the semiconductor chips.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.