Miller compensation circuit and electronic circuit
US10763796B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2019 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | May 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Miller compensation circuit includes: a differential amplifier having an inverse input end configured to receive an input signal; an output transistor having an output end connected to a positive input end of the differential amplifier, a first end connected to a first power supply, a second end connected to an output end of the differential amplifier, and a third end being a voltage output end and connected to the positive input end and a load; a Miller capacitor connected to the output end of the differential amplifier; a follower; and a current sampling circuit configured to sample a first current of the output transistor. The load is also connected to a second power supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.