Multiphase oscillator circuit
US10763833B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2018 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Dec 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/014
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In described examples, a ring oscillator includes a series of N stages in a first ring. Each stage includes a respective output terminal coupled to a respective input terminal of a next one of the stages in the first ring. N is a positive odd-numbered integer of at least three. A series of N level shifters in a second ring are respectively connected to the N stages. Each level shifter receives a respective clock output from a respective output terminal of a stage to which it is connected and generates a respective boosted clock output in response thereto. The boosted clock output is coupled to control an impedance state of a next one of the level shifters in the second ring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.