Loss of signal detection circuit
US10763841B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2019 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Aug 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0042
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first inverter coupled between first and second nodes, a second inverter coupled between third and fourth nodes, and a first logic circuit having a first input coupled to the second node, a second input coupled to the fourth node, and an output, a first positive feedback circuit coupled between the first and third nodes and having a control input. The first positive feedback circuit comprises a first switch coupled between the first and fifth nodes and having a control input, a second switch coupled between the third and sixth nodes and having a control input, a third inverter having an input coupled to the sixth node and an output coupled to the fifth node, and a fourth inverter having an input coupled to the fifth node and an output coupled to the sixth node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.