Multi-mode power management circuit
US10763853B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2018 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Mar 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J7/34
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In an example, a circuit comprising a first inductor coupled between a first node and a second node, a first PMOS having a source terminal coupled to the second node and a drain terminal coupled to a third node, a second PMOS having a source terminal coupled to a ground voltage potential and a drain terminal coupled to the second node, a third PMOS having a source terminal coupled to a fourth node and a drain terminal coupled to the third node, a fourth PMOS having a source terminal coupled to the ground voltage potential and a drain terminal coupled to the fourth node, a NMOS having a source terminal coupled to the third node and a drain terminal coupled to a fifth node, a second inductor coupled between the fourth node and the fifth node, and a controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.