High voltage interface circuit
US10763855B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2019 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Dec 16, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/911
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes a high voltage (HV) transistor having a first current electrode, a second current electrode, and a control electrode coupled to receive a control signal. The HV transistor is configured and arranged to be non-conductive when the control signal is at a first state and conductive when the control signal is at a second state. A low voltage (LV) transistor is coupled to the first current electrode of the HV transistor. An HV pad is coupled to the second current electrode of the HV transistor. An operating voltage rating of the HV pad exceeds an operating voltage rating of the LV transistor. A secondary electrostatic discharge protection device is coupled between the second current electrode of the HV transistor and a voltage supply terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.