Patent · US Active

Loop-back probe test and verification method

US10768206B2 · kind B2 · utility

0Cited by
3References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 21, 2016
Grant dateSep 8, 2020
Priority date
Expiry dateNov 21, 2037

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2891
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method is provided for using a loop-back test device to verify continuity between loop-back probes electrically connected to each other on a probe card, the loop-back test device including a first conductive region electrically connected to a substrate, a second conductive region electrically isolated from the substrate, the second conductive region spaced apart from the first conductive region such that when a first loop-back probe contacts the first conductive region a second loop-back probe contacts the second conductive region, The method includes placing the first loop-back probe in electrical contact with the first conductive region, and placing the second loop-back probe in electrical contact with the second conductive region. Continuity between the substrate and the second conductive region is then measured.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.