Cache protection through cache
US10769021B1 · kind B1 · utility
0Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2010 |
| Grant date | Sep 8, 2020 |
| Priority date | — |
| Expiry date | Sep 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1052
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache coherency protection system provides for data redundancy by sharing a cache coherence memory pool for protection purposes. The system works consistently across all communication protocols, yields improved data availability with potentially less memory waster and makes data availability faster in node/director failure scenarios. According to various embodiments, the cache coherency protection system may include a writer/requester director that receives a write request from host, a protection target director that is a partner of the writer/request director and a directory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.