Scanning signal line drive circuit, display device including the same, and scanning signal line driving method
US10770018B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2019 |
| Grant date | Sep 8, 2020 |
| Priority date | — |
| Expiry date | Mar 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present application discloses a scanning signal line drive circuit capable of reducing power consumption and narrowing a picture-frame while ensuring high-speed scanning for image display. First and second gate drivers 410, 420 are arranged to face each other via a display unit 500. Based on a DC buffer method, odd-numbered gate lines are driven by the first gate driver 410 while even-numbered gate bus lines are driven by the second gate driver 420, and when each gate bus line GLi is to be brought into a non-selected state, charges are released from both ends thereof. For this purpose, for example, the end portion of the odd-numbered gate bus line on the first gate driver side is connected to a buffer made up of the activation and inactivation transistors M10, M13L, and the end portion of the odd-numbered gate bus line on the second gate driver side is connected to the inactivation auxiliary transistor M13R.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.