Device comprising a stack of electronic chips
US10770411B2 · kind B2 · utility
0Cited by
2References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2019 |
| Grant date | Sep 8, 2020 |
| Priority date | — |
| Expiry date | Apr 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15192
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of protecting a first chip in a multi-chip stack includes determining an electrical characteristic of a conductive loop. The conductive loop extends over a top portion of the first chip. The conductive loop also extends through the first chip and within a top portion of a second chip. The top portion of the second chip is adjacent to a bottom portion of the first chip. The method further includes determining whether the electrical characteristic indicates that an attack is being made to determine contents or operation of the first chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.