Optimized non-uniform memory access
US10776046B1 · kind B1 · utility
6Cited by
46References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 6, 2018 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Jul 6, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one implementation, a method includes receiving code associated with two or more cores of a storage array controller. The method further includes determining, by the storage array controller, that the code is executable and read-only. The method further includes loading, based on the determination, the code into two or more memory pages corresponding to the two or more cores, wherein each of the two or more memory pages is local to each of the two or more cores, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.