On-die input capacitive divider for wireline receivers with integrated loopback
US10776234B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 8, 2018 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Mar 13, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R15/06
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
There is provided an integrated loopback used for on-die self-test and diagnosis of transceiver faults. According to embodiments, there is provided an interface network including an AC coupling capacitor interposed between input pins of the interface network and an input of an amplifier, a shunt capacitor interposed between the AC coupling capacitor and the input of the amplifier and a selector. The selector includes a mission mode circuit component connected to a bottom plate of the shunt capacitor and the selector is configured to select between a first mode and a second mode, wherein the first mode is mission mode and the second mode is loopback mode, wherein in the second mode the mission mode circuit component forms at least part of a circuit that supplies a loopback signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.