Integrated circuit having timing fixing circuit that introduces no short-circuit current under normal operation and associated timing fixing cell in cell library
US10776550B1 · kind B1 · utility
1Cited by
8References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2019 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Apr 14, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/13
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a path logic and a timing fixing circuit. The path logic is coupled between an output pin of a first circuit and an input pin of a second circuit. The timing fixing circuit has an input pin coupled to the path logic, and is used to adjust a propagation delay of the path logic. The timing fixing circuit introduces no short-circuit current under normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.