Gate driver and display device including the same
US10777143B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2019 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Aug 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0295
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver includes a gate shift register in which an A block and a B block each having a plurality of stages, the A block and the B block being alternately arranged; scan clock lines inputting a first scan clock group and a second scan clock group each including both image data writing (IDW) scan clocks synchronized with an image write timing and black data insertion (BDI) scan clocks synchronized with a black write timing to the A block and the B block; and carry clock lines inputting carry clocks to the A block and the B block and sense clock lines inputting sense clocks to the A block and the B block, wherein each of the stages belonging to the A block and the B block includes a BDI memory storing a BDI carry signal for outputting the BDI scan clocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.