Semiconductor device including a pad and a wiring line arranged for bringing a probe into contact with the pad and method of manufacturing the same
US10777507B2 · kind B2 · utility
2Cited by
1References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2016 |
| Grant date | Sep 15, 2020 |
| Priority date | — |
| Expiry date | Feb 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/386
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a plurality of wiring layers including a first wiring layer and a second wiring layer, with the first wiring layer being the uppermost layer and including a pad PD that has a first region for bonding a copper wire, and a second region for bringing a probe into contact with the pad. The second wiring layer is one layer below the first wiring layer and includes a first wiring line arranged immediately below the second region of the pad, the second wiring layer having no conductor pattern at a region overlapping with the first region of the pad PD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.