Semiconductor integrated circuit and signal processing method
US10782330B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 20, 2017 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Feb 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/15
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present disclosure relates to a semiconductor integrated circuit and a signal processing method that can improve measurement accuracy. Pulses subjected to pulse generation and disconnection control by a control circuit are supplied to a pulse distribution circuit and a CP circuit. The pulse distribution circuit divides one pulse into two or more pulses that do not overlap each other, and supplies the pulses to a CBCM circuit. The CBCM circuit is configured by connecting a capacitance element to be measured to the output of a measurement core circuit called a pseudo inverter. The CP circuit inputs, to the gate electrode, pulses that cause a channel of a non-measurement MISFET to change from the accumulation state to the inverted state, and monitors, from the substrate side, a CP current flowing through a trap acting as a recombination center of the gate insulating film and the semiconductor substrate interface. The present disclosure can be applied to, for example, a semiconductor integrated circuit for evaluating the characteristics of the gate insulating film of the MISFET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.