Systems, methods, and apparatus for combatting direct memory access attacks
US10783281B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2018 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Nov 19, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/75
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system includes technology to detect a memory attack. The data processing system comprises a processing core, a memory controller, a memory bus, and memory. The memory controller comprises a memory attack detection module (MADM). The MADM comprises first and second input units and control logic in communication with the first and second input units. The control logic is configured to determine, based on first and second signals from the first and second input units, respectively, whether the memory bus is carrying a clock enable (CKE) signal of high (H), even though the memory controller is generating the CKE signal of low (L). The control logic is also configured to generate a physical memory attack detection indicator that indicates whether the memory bus is carrying the CKE signal of H, even though the memory controller is generating the CKE signal of L. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.