Patent · US Active

System and method for power-grid aware simulation of an IC-package schematic

US10783307B1 · kind B1 · utility

1Cited by

11References

20Claims

0Family size

Assignee

Cadence Design Systems, Inc. · US

Inventors

Taranjit Singh Kukal · Delhi, IN
Balvinder Singh · Faridabad, IN
Vikas Aggarwal · Brisbane, US

Key dates

Filing date	Dec 12, 2018
Grant date	Sep 22, 2020
Priority date	—
Expiry date	Dec 18, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/06
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments include herein are directed towards a method for use in an electronic design environment is provided. The method may include providing, using at least one processor, an electronic circuit design including an integrated circuit (“IC”) or package schematic and generating a power distribution network (“PDN”) based upon at least in part, the electronic circuit design including the IC or package. The method may further include obtaining a PDN model having one or more port mappings between one or more layout terminals and one or more schematic pin-names and stitching the PDN model and the IC or package schematic into a combined PDN and IC or package schematic model. The method may also include simulating the combined PDN and IC or package schematic model using the at least one processor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.