TFT pixel threshold voltage compensation circuit with short programming time
US10783830B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2019 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | May 14, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel circuit has enhanced performance by minimizing noise effects from the data and reference voltage lines. To prevent data line noise from interfering with the drive transistor gate voltage during emission, a triple gate isolation is used between the data voltage line and the gate of the drive transistor by which three transistors are connected between the data voltage line and the gate of the drive transistor. To further improve the isolation, one of the middle nodes of the triple gate farthest from the data voltage line is connected to one floating node that is connectable to a reference voltage during the threshold compensation phase. A first capacitor is used for the threshold compensation, and a second capacitor is used to scale the data voltage during programming. The threshold compensation and data programming operations are thereby independent of each other to minimize programming time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.