Apparatus and method for fast memory validation in a baseboard management controller
US10783857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2018 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Oct 11, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/18
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An information handling system includes a host processing complex with a memory, and a baseboard management controller (BMC) with a processor and a video capture and difference engine (VCDE). The processor receives a memory compare command. The memory compare command includes a first pointer to a first block of the memory, a second pointer to a second block of the memory, and a memory block size. The processor further determines whether the memory block size is greater than a threshold, and forwards the memory compare command to the VCDE when the memory block size is greater than the threshold. The VCDE compares contents of the first block to contents of the second block in response to receiving the memory compare command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.