Shift register, driving method thereof, gate driving circuit, display panel and display device
US10783977B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 27, 2019 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Aug 27, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register including an input circuit, an output circuit, a first output control circuit, a second output control circuit, a reset circuit, a first reset control circuit, a second reset control circuit, and an energy-storing circuit. The first output control circuit is configured to transfer a clock signal present at a third clock signal terminal to a first node in response to the clock signal at the third clock signal terminal being active. The second output control circuit is configured to transfer a voltage present at a first voltage terminal to the first node in response to a clock signal at a fourth clock signal terminal being active.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.