Vertical solid state devices
US10784398B2 · kind B2 · utility
0Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2016 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Jan 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H29/14
Abstract
A vertical current mode solid state device comprising a connection pad and side walls comprising a metal-insulator-semiconductor (MIS) structure, wherein leakage current effect of the vertical device is limited through the side walls by biasing the MIS structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.