Blended anti-aliasing analog-to-digital conversion for digital test and measurement devices
US10784881B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2019 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Nov 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0678
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to blended analog-to-digital conversion for digital test and measurement devices. A first analog-to-digital converter (ADC) converts an analog signal into a first digital signal a first sampling rate. A digital filtering component generates a filtered digital signal by processing the first digital signal. An analog low pass filter filters the analog signal to generate a filtered analog signal. A second ADC converts the filtered analog signal into a second digital signal. A digital subtractor circuit subtracts the filtered digital signal from the first digital signal or the second digital signal. A digital adder circuit generates a blended digital signal by processing an output of the digital subtractor circuit and one of the first digital signal or the second digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.