Protection of keys and sensitive data from attack within microprocessor architecture
US10785028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2018 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Mar 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/0894
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A processor core that includes a token generator circuit is to execute a first instruction in response to initialization of a software program that requests access to protected data output by a cryptographic operation. To execute the first instruction, the processor core is to: retrieve a key that is to be used by the cryptographic operation; trigger the token generator circuit to generate an authorization token; cryptographically encode the key and the authorization token within a key handle; store the key handle in memory; and embed the authorization token within a cryptographic instruction that is to perform the cryptographic operation. The cryptographic instruction may be associated with a first logical compartment of the software program that is authorized access to the protected data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.