Semiconductor integrated circuit and receiving apparatus
US10785070B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2020 |
| Grant date | Sep 22, 2020 |
| Priority date | — |
| Expiry date | Feb 11, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03885
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor integrated circuit includes: an equalizer circuit; a decision circuit that decides a bit value of a data signal; a sampler unit including sampler circuits, the sampler circuits having different thresholds and electrically connected in parallel between the equalizer circuit and the decision circuit; a determination circuit that determines indexes indicating a degree of confidence of current output values from the sampler circuits based on the bit values of the data signals at different past timings; and an arithmetic circuit that computes scores for bit values that are candidates for a current data signal based on the determined indexes and current output values from the sampler circuits. The decision circuit selects one bit value from the candidate bit values using the scores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.