Patent · US Active

Dynamic thread splitting having multiple instruction pointers for the same thread

US10789071B2 · kind B2 · utility

1Cited by

3References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Hema Chand Nalluri · Hyderabad, IN
Supratim Pal · Bengaluru, IN
Subramaniam Maiyuran · Citrus, US
Joy Chandra · Bengaluru, IN

Key dates

Filing date	Jul 8, 2015
Grant date	Sep 29, 2020
Priority date	—
Expiry date	Nov 8, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06T1/20
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems, apparatuses and methods may provide for associating a first instruction pointer with an IF block of a primary IF-ELSE conditional construct associated with a thread and activating a second instruction pointer in response to a dependency associated with the IF block. Additionally, the second instruction pointer may be associated with an ELSE block of the primary IF-ELSE conditional construct. In one example, the IF block and the ELSE block are executed, via the first instruction pointer and the second instruction pointer, one or more of independently from or parallel to one another.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.