Patent · US Active

Self-tuning digital clock generator

US10790837B1 · kind B1 · utility

3Cited by
6References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 22, 2019
Grant dateSep 29, 2020
Priority date
Expiry dateOct 22, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L2207/50
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

In certain aspects, a clock generator includes a ring oscillator including an input and an output. The clock generator also includes a count circuit including an input and an output, wherein the input of the count circuit is coupled to the output of the ring oscillator. The clock generator also includes a comparator including a first input, a second input, and an output, wherein the first input of the comparator is configured to receive a first count value, and the second input of the comparator is coupled to the output of the count circuit. The clock generator further includes a shift register including a shift control input and an output, wherein the shift control input is coupled to the output of the comparator, and the output of the shift register is coupled to the input of the ring oscillator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.