Patent · US Active

Failover method, apparatus and system

US10795785B2 · kind B2 · utility

1Cited by
1References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 12, 2018
Grant dateOct 6, 2020
Priority date
Expiry dateNov 22, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L1/22
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A failover method, apparatus and system to implement fast failover between a primary processor and a secondary processor, where the method includes receiving, by a first device, transaction content of a transaction and transaction status data of the transaction, the transaction status data being used to resume the transaction when the transaction is interrupted by a failure of a second device, and continuing to process, by the first device, the transaction according to the transaction content and the transaction status data when detecting that the second device fails.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.