Methods of manufacturing integrated circuit devices
US10796920B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 10, 2019 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Dec 10, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76849
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing an integrated circuit device are provided. A method of manufacturing an integrated circuit device includes sequentially forming a device layer, a wiring insulating layer, and a hard mask layer on a semiconductor substrate. The method includes sequentially removing a first region and a second region of the hard mask layer by using a first mask layer having a first opening and a second mask layer having a second opening as an etch mask, respectively. The method includes forming a first wiring recess through the wiring insulating layer and a second wiring recess having a depth that is less than that of the first wiring recess by removing a portion of the wiring insulation layer by using a portion of the hard mask layer as an etching mask. Moreover, the method includes forming a wiring structure that is in the first wiring recess and the second wiring recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.