Method and apparatus to control temperature of a semiconductor die in a computer system
US10796977B2 · kind B2 · utility
0Cited by
12References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2019 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Mar 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2200/201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuitry to apply heat to a die while the die junction temperature is below a minimum die junction temperature of an operating die junction temperature range for the die is provided. The circuitry to avoid a system boot failure when the die junction temperature is below the operating die junction temperature range of the die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.