Display device having compensating capacitor and method of manufacturing the same
US10797089B2 · kind B2 · utility
2Cited by
2References
16Claims
0Family size
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Key dates
| Filing date | Dec 12, 2017 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Dec 22, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0267
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device and a method of manufacturing the same are disclosed. The display device includes a substrate (100), and a patterned polysilicon layer, a patterned gate insulating layer and a patterned first conductive layer stacked on the substrate in sequence. The patterned polysilicon layer includes a number of polysilicon blocks (110) doped with impurities. The patterned first conductive layer includes a number of data lines (120) each partially overlapping a corresponding polysilicon block to form a compensating capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.