Signal duty cycle adaptive-adjustment circuit and method for receiving terminal
US10797687B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2017 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | May 15, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a signal duty cycle adaptive-adjustment circuit and method for a receiving terminal. In one embodiment, the circuit includes an analog level comparison circuit, a preprocessing circuit, a first path switch, a second path switch, a decoding circuit, a parameter extraction and estimation circuit, an error generation circuit, a filter feedback circuit and a digital-to-analog conversion circuit. The analog level comparison circuit receives a valid signal according to a reference level to generate a duty cycle signal. The preprocessing circuit preprocesses the duty cycle signal. When the first path switch is turned on, the parameter extraction and estimation circuit acquires duty cycle information from the duty cycle signal to generate a duty cycle deviation. The error generation circuit processes the duty cycle deviation to generate an error signal. The filter feedback circuit and the digital-to-analog conversion circuit filter the error signal and then convert the error signal into an analog voltage signal, which is connected to the analog level comparison circuit to serve as a reference level. When the second path switch is turned on, the decoding cir…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.