Dual edge synchronization of analog input to reduce switch point jitter
US10797851B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2018 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Apr 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R35/00
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for synchronization of an input signal includes providing the input signal to a first signal path associated with a first clock and to a second signal path associated with a second clock, detecting an edge of the input signal by detecting values of the input signal along the first signal path at a first rising edge of the first clock and at a second rising edge of the first clock, detecting a value of the input signal along the second signal path at an edge of the second clock, and selecting the input signal from the first signal path or from the second signal path according to the detected value of the input signal along the second path when an edge of the input signal along the first path is detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.