Data interleaving scheme for an external memory of a secure microcontroller
US10797857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2012 |
| Grant date | Oct 6, 2020 |
| Priority date | — |
| Expiry date | Dec 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/14
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention relates to methods of interleaving payload data and integrity control data in an external memory interfaced with a microcontroller to improve data integrity check, enhance data confidentiality and save internal memory. Data words are received for storing in the external memory. Each data word is used to generate a respective integrity word, while an associated logic address is translated to two physical addresses in the external memory, one for the data word and the other for the integrity word. The two physical addresses for the data and integrity words are interleaved in the external memory, and sometimes, in a periodic scheme. In particular, each data word may be associated to an integrity sub-word included in an integrity word having the same length with that of a data word. The external memory may have dedicated regions for the data words and the integrity words, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.