Array substrate, method for fabricating the same, display panel, and display device
US10802630B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2018 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Jun 21, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure discloses an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: a base substrate, a pressure-sensitive component, a plurality of dual-gate transistors, and a plurality of pixel transistors, where the pressure-sensitive component includes a first electrode layer, a pressure-sensitive layer, and a second electrode layer which are arranged on the base substrate in that order, and the second electrode layer includes a plurality of second electrodes arranged corresponding to the respective dual-gate transistors in a one-to-one manner; and the dual-gate transistors and the pixel transistors are arranged above the second electrode layer, and each of the plurality of second electrodes is electrically connected with a bottom-gate electrode in a corresponding dual-gate transistor, so that a pressure can be detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.