Memory location remapping and wear-levelling
US10802936B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Sep 14, 2015 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Oct 25, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one example a system includes a memory, and at least one memory controller to: detect a failed first memory location of the memory, remap the failed first location of the memory to a spare second location of the memory based on a pointer stored at the failed first memory location, and wear-level the memory. To wear-level the memory, the memory controller may copy data from the spare second location of the memory to a third location of the memory, and keep the pointer in the failed first memory location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.