Trusted out-of-band memory acquisition for IOMMU-based computer systems
US10802982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2018 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Oct 26, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an interface and memory acquisition circuitry. The interface is configured to communicate over a bus operating in accordance with a bus protocol, which supports address-translation transactions that translate between bus addresses in an address space of the bus and physical memory addresses in an address space of a memory. The memory acquisition circuitry is configured to read data from the memory by issuing over the bus, using the bus protocol, one or more requests that (i) specify addresses to be read in terms of the physical memory addresses, and (ii) indicate that the physical memory addresses in the requests have been translated from corresponding bus addresses even though the addresses were not obtained by any address-translation transaction over the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.