Transistor noise tolerant, non-volatile (NV) resistance element-based static random access memory (SRAM) physically unclonable function (PUF) circuits, and related systems and methods
US10803942B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 7, 2019 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Jun 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Transistor noise tolerant, non-volatile (NV) resistance element-based static random access memory (SRAM) physically unclonable function (PUF) circuits and related systems and methods. In exemplary aspects, a transistor and its complementary transistor, such as a pull-up transistor and complement pull-down transistor or pull-down transistor and complement pull-up transistor, of the PUF circuit are replaced with passive NV resistance elements coupled to the respective output node and complement output node to enhance imbalance between cross-coupled transistors of the PUF circuit for improved PUF output reproducibility. The added passive NV resistance elements replacing pull-up or pull-down transistors in the PUF circuit reduces or eliminates transistor noise that would otherwise occur if the replaced transistors were present in the PUF circuit as a result of changes in temperature, voltage variations, and aging effect. The bit error rate of the PUF circuit is reduced by the reduction in transistor noise thereby improving PUF output reproducibility.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.