Method for the integration of power chips and bus-bars forming heat sinks
US10804183B2 · kind B2 · utility
0Cited by
0References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 6, 2017 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | May 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/2518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method for producing a preform integrating at least one electronic chip included between insulating and/or conductive laminated internal layers; mechanically securing metal bus-bar segments at given spaced-apart positions on opposing upper and lower faces of the preform, using dielectric portions of a resin prepreg; and for each of the upper and lower opposing faces, electrodepositing a metal layer in order to interconnect bus-bar segments secured to the face in question and an electrode of the electronic chip, thereby forming an electronic power circuit comprising bus-bars forming heat sinks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.