Systems and methods for a current sense amplifier comprising a sample and hold circuit
US10804851B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2019 |
| Grant date | Oct 13, 2020 |
| Priority date | — |
| Expiry date | Apr 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45526
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Described herein are systems and methods that reduce settling time in amplifier circuits, such as voltage sense amplifiers (VSA) or current sense amplifiers (CSA) circuits, that comprise a feedback path. When the feedback path is interrupted via a switch, a CSA circuit switches to open loop. A sample-and-hold circuit holds the output voltage of the amplifier, such that when a load is connected to the CSA circuit, the open loop settling time, which is shorter than the closed loop settling time, is allowed to pass before the CSA output voltage is measured, thereby, advantageously preventing any potential disturbance present at the CSA output from being fed back to the CSA input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.