Simulator based detection of a violation of a coherency protocol in an incoherent shared memory system
US10810070B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2016 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Jul 1, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Simulator based detection of a violation of a coherency protocol in an incoherent shared memory system is disclosed. One example is a system including a simulator running on a first computing system, where the simulator simulates a second computing system that is a target for an application to be tested, and where the simulator includes a cache manager to monitor a state of a plurality of simulated caches in an incoherent memory system shared by a plurality of simulated processors, wherein the plurality of simulated processors simulate operations of a respective plurality of processors of the second computing system, and detect a violation of a coherency protocol in the shared memory system, and an alert generator to provide, via a computing device on the first computing system, an alert indicative of the violation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.