Patent · US Active

Multi-block non-volatile memories with single unified interface

US10811096B2 · kind B2 · utility

0Cited by

2References

17Claims

0Family size

Assignee

Aspiring Sky Co. Limited · CN

Inventors

Zhijiong Luo · Poughkeepsie, US
Shu Wang · Shakopee, US
Xiaoming Jin · Shanghai, CN

Key dates

Filing date	May 17, 2018
Grant date	Oct 20, 2020
Priority date	—
Expiry date	Aug 8, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/32
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory system may include one or more hybrid fast memory blocks with m-bit fast volatile random access memory (RAM) cells and N×m bit non-volatile memory (NVM) cells. The memory system may also include one or more other memory blocks with NVM cells. The fast flash memory may buffer the NVM data improving access speed. The different memory blocks may utilize a single, unified interface to communicate with other devices/circuits. The unified interface may be a parallel interface (e.g., flash memory/SRAM combinations), or the unified interface may be a pipeline interface (e.g., system on a chip “SOC” implementations) supporting fast memory read/write operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.