Patent · US Active

Die edge integrity monitoring system

US10811327B2 · kind B2 · utility

1Cited by

2References

4Claims

0Family size

Assignee

MELEXIS TECHNOLOGIES NV · BE

Inventors

Gunnar Munder · Erfurt, DE
Heiko Grimm · Waltershausen, DE
Thomas Freitag · Hamburg, DE

Key dates

Filing date	Jan 6, 2020
Grant date	Oct 20, 2020
Priority date	—
Expiry date	Jan 6, 2040

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2223/6677
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An edge crack monitoring system for an integrated circuit provided on a die, comprises a conductive trace comprising at least a first conductive path for allowing current in a first direction, and a second adjacent conductive path for allowing current in a second direction opposite to the first direction. Both adjacent conductive paths form at least one loop surrounding a semiconductor device on a die. The arrangement of the trace is adapted to provide compensation of EM interferences. The trace comprises two terminals being connectable to a detection circuit for detecting damages by generating a fault signal upon detection of disruption of the conductive trace due to a damage. The conductive trace comprises high resistance portions with a resistance of at least 1 kΩ, adapted for reducing self-resonance.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.