Thermal-dissipating substrate structure
US10811332B2 · kind B2 · utility
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16Claims
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Assignee
Inventors
Key dates
| Filing date | Oct 31, 2018 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Oct 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate structure is provided, including a substrate, an integrated circuit chip, a circuit structure, and a thermal-dissipating structure. The integrated circuit chip is disposed in the substrate. The circuit structure is electrically connected to the integrated circuit chip. The thermal-dissipating structure is disposed in the substrate and adjacent to the integrated circuit chip, and the thermal-dissipating structure is electrically isolated from the circuit structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.