Thread-level sleep in a multithreaded architecture
US10817295B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2017 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Jun 3, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/485
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A streaming multiprocessor (SM) includes a nanosleep (NS) unit configured to cause individual threads executing on the SM to sleep for a programmer-specified interval of time. For a given thread, the NS unit parses a NANOSLEEP instruction and extracts a sleep time. The NS unit then maps the sleep time to a single bit of a timer and causes the thread to sleep. When the timer bit changes, the sleep time expires, and the NS unit awakens the thread. The thread may then continue executing. The SM also includes a nanotrap (NT) unit configured to issue traps using a similar timing mechanism to that described above. For a given thread, the NT unit parses a NANOTRAP instruction and extracts a trap time. The NT unit then maps the trap time to a single bit of a timer. When the timer bit changes, the NT unit issues a trap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.