Network on-chip topology generation
US10817627B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2019 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Jul 22, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a computer-based method and system for synthesizing a NoC. Physical data, device data, bridge data and traffic data are determined based on an input specification for the NoC. A virtual channel (VC) is assigned to each traffic flow. A head of line (HoL) conflict graph (HCG) is constructed based on the traffic data and the VC assignments. A color is assigned to each HCG node to minimize HoL conflicts. A traffic graph (TG) is constructed for each color based on the physical data, the bridge data, the traffic data and the HCG, and a candidate topology is generated for each color based on the respective TG. The candidate topology for each color is merged to create a merged candidate topology, and the routers within the merged candidate topology are merged to generate a final topology for the NoC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.