Display panel, array substrate, thin film transistor and method for manufacturing the same
US10818798B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 13, 2019 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | May 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.