Electronic unit comprising an ESD protective arrangement
US10819107B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2017 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Dec 31, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1327
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to an electronic unit with a circuit board having at least one component arranged on a main surface of the circuit board and a casing element, which incorporates the at least one component, as well as with an ESD protection arrangement for the circuit board. According to the disclosure, open areas on the circuit board, which are not covered by the casing element, are covered with a gold layer directly mounted on a copper surface of the circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.