Patent · US Active

Gate driver circuit with a closed loop overdrive generator

US10819351B1 · kind B1 · utility

1Cited by
8References
12Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 28, 2019
Grant dateOct 27, 2020
Priority date
Expiry dateMay 28, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K17/6872
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A driver circuit comprises a first transistor coupled to a second transistor, and a third transistor coupled to the first and second transistor and to a first current mirror. An output of the first current mirror is provided to a control input of the second transistor. A second current mirror is coupled to the output of the first current mirror. A first current source, a second current source, and a fourth transistor are coupled to the second current mirror. The second current source is further coupled to a fifth transistor. A sixth transistor is coupled to the fifth transistor and to a third current mirror. In some implementations, the driver circuit is coupled to a low side transistor in an H bridge driver and the second transistor is matched to the low side transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.